Recently, image sensors using complementary metal oxide semiconductor (CMOS) (below, referred to as CMOS sensors) have come into wide use. CMOS is a standard technology used in IC manufacturing. The CMOS sensor does not require the same high drive voltage that a charge coupled device (CCD) needs. In addition, the CMOS sensor can be integrated with a peripheral circuit (on-chip structure). Advantageously, the CMOS sensor greatly contributes to reduced size.
The CMOS sensor includes a two-dimensional array of pixels. One pixel region includes many component transistors such as a photoelectric conversion element, a readout gate, a voltage conversion element, a reset gate, and an amplifier. Accordingly, it is difficult to reduce the size of a pixel. A structure in which the components required for each pixel are partially shared between a plurality of pixels to reduce the area occupied by one pixel excluding the photoelectric conversion element, i.e., a multi-pixel sharing structure has recently been proposed. Such a technique is absolutely required to reduce the size of each pixel in the CMOS sensor. FIG. 12 shows a structure as a specific example. In the structure, a voltage conversion element and other circuit components (transistors such as a reset gate and similar components) to be shared are arranged between two photoelectric conversion elements 21. FIG. 13 shows another structure in which a voltage conversion element 23 and other circuit components are shared between two photoelectric conversion elements 21 and two readout gates 22 and the shared circuit components are arranged in each transistor region 24 adjacent to the photoelectric conversion elements 21.
In the conventional multi-pixel sharing structure, however, the photoelectric conversion elements and the component transistors cannot actually be arranged uniformly. Therefore, the degree of sharing the component transistors is not always proportional to the area occupancy ratio of the photoelectric conversion element. The reason is that the size of a component transistor in each small pixel is large relative to the pixel size and flexibility in shape is not high due to the limits of manufacturing techniques and those of physical properties. It is absolutely essential that the optical centers of pixels be equally spaced two-dimensionally and all of the pixels have the same fundamental characteristics. Therefore, even if the area (transistor area) occupied by transistors excluding the photoelectric conversion element in each pixel is reduced, a free space formed by reducing the occupied area cannot effectively be used because it is necessary to assign high priority to uniform arrangement, i.e., symmetry. In other words, when a free space is effectively utilized, the optical pixel centers cannot be equally spaced two-dimensionally.
For example, in the multi-pixel sharing structure shown in FIG. 12, when the size of each component transistor is small relative to the pixel area, the component transistors can be arranged in a space between the photoelectric conversion elements 21. As the pixel area becomes smaller, the spacing between transistors or that between interconnects used for connection becomes narrower. This leads to poor design flexibility. It is difficult to allocate the photoelectric conversion element 21 to the optical center (pixel center) of each pixel.
In the multi-pixel sharing structure shown in FIG. 13, a region for the photoelectric conversion element 21 is separated from the transistor region 24. Accordingly, this structure is efficient in terms of pixel arrangement. A well-balanced arrangement layout can also be provided. However, since the transistor regions 24 and the regions for the photoelectric conversion elements 21 are aligned, if the transistor region 24 is large, the region for the photoelectric conversion element 21 is widely reduced. Consequently, it is difficult to allocate the photoelectric conversion element 21 to the optical center (pixel center) of each pixel. It is further difficult to ensure the amount of signal charge accumulatable in each photoelectric conversion element 21.
In addition to the multi-pixel sharing structures shown in FIGS. 12 and 13, another multi-pixel sharing structure in FIG. 14 is available. According to the structure, the photoelectric conversion elements 21 are vertically arranged. In this multi-pixel sharing structure, however, since the number of shared voltage conversion elements 23 is few and the capacity of the diffusion layer is increased the voltage conversion efficiency may decrease. Further, the other multi-pixel sharing structure in FIG. 15 is also available. In the structure, sharing in the vertical direction is combined with that in the horizontal direction. In this multi-pixel sharing structure, it is necessary to read out signals of one row such that the signals are divided into two parts. Also disadvantageously, output signals may be different from typical video signals.
Accordingly, it is an object of the present invention to provide a solid-state imaging device with a multi-pixel sharing structure in which even when each pixel area is reduced, the sufficient area for each photoelectric conversion element can be ensured by effectively using a free space and the photoelectric conversion element is allocated to the optical center of each pixel such that the optical pixel centers can be equally spaced two-dimensionally.